Technical Description
An in-memory static random-access memory (SRAM) cell that boosts the speed and efficiency of field programmable gate arrays. The technology is a supersmart storage system that changes how computers work, making them faster and more energy-efficient by using a unique approach different from traditional methods.
Problems Addressed
- Data Disturbance
- Requirement of 2n SRAM Cell
- Unsuitability as an FPGA Accelerator
- von Neumann Bottleneck Limitation
- Low Power Efficiency
- Low Programming Speed
Tech Features
- Non von Neumann Architecture
- High Power Efficiency
- Increased Speed
- Decoupled Read and Write Port
- Uses Less Area
- High Output
Target Audience
- Information Technology Industry
- Telecommunication Sector
- Aerospace Industry
- Medical Sector
- Automotive Electronics
- Consumer Electronics
Tech ID: P10-1078 TRL 3 Patent Status: Application is Published Filed in India Available For Exclusive and Non-exclusive License
